EDN

Altera, Synopsys plan ‘ASIC-like’ design solutions for complex PLDs

SAN JOSE — Altera Corp. and Synopsys Inc. today announced plans to jointly develop ASIC-like design solutions for complex system-on-programmable-chip (SoPC) devices. The partnership will address the ...
EDN

Altera, Synopsys in Design Tool Pact

Altera Corp. and Synopsys Inc. last week inked an agreement to create ASIC-like design software for system-on-a-programmable-chip (SOPC) devices. A part of the program is bringing the .lib, SDC ...
Semiconductor Engineering

Rapid Timing Constraints Signoff With Automated Constraint Management

Signoff of a system on chip (SoC) or IP design has multiple aspects, but often timing closure is the most challenging. Early use of a static timing analysis (STA) tool is clearly important, and such a ...
Seeking Alpha

Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design

SUNNYVALE, Calif., Sept. 25, 2024 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced its continued, close collaboration with TSMC to deliver advanced EDA and IP solutions on TSMC's most ...